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PCI_POWER_STATE

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struct PCI_POWER_STATE {
/* 4 bytes padding */
void (*SavedCancelRoutine)(struct _DEVICE_OBJECT*, struct _IRP*);/* 0x38 8 */
/* ── cacheline 1 boundary (64 bytes) ── */
long Paging;/* 0x40 4 */
long Hibernate;/* 0x44 4 */
long CrashDump;/* 0x48 4 */
};
size 80 (0x50)10 members1 hole (4 bytes)padding 42 cachelines
Used in (2)