struct PO_MEMORY_IMAGE { unsigned long Signature;/* 0x0 4 */ unsigned long ImageType;/* 0x4 4 */ unsigned long CheckSum;/* 0x8 4 */ unsigned long LengthSelf;/* 0xc 4 */ unsigned __int64 PageSelf;/* 0x10 8 */ unsigned long PageSize;/* 0x18 4 */ /* 4 bytes padding */ union _LARGE_INTEGER SystemTime;/* 0x20 8 */ unsigned __int64 InterruptTime;/* 0x28 8 */ unsigned __int64 FeatureFlags;/* 0x30 8 */ unsigned char HiberFlags;/* 0x38 1 */ unsigned char HiberSimulateFlags;/* 0x39 1 */ unsigned char spare[2];/* 0x3a 2 */ unsigned long NoHiberPtes;/* 0x3c 4 */ /* ── cacheline 1 boundary (64 bytes) ── */ unsigned __int64 HiberVa;/* 0x40 8 */ unsigned long RestoredPagesBitmapSize;/* 0x48 4 */ unsigned long RestoredPagesBitmapBitmapCheck;/* 0x4c 4 */ unsigned long WakeCheck;/* 0x50 4 */ /* 4 bytes padding */ unsigned __int64 NumPagesForLoader;/* 0x58 8 */ unsigned __int64 FirstSecureRestorePage;/* 0x60 8 */ unsigned __int64 FirstBootRestorePage;/* 0x68 8 */ unsigned __int64 FirstKernelRestorePage;/* 0x70 8 */ unsigned __int64 FirstChecksumRestorePage;/* 0x78 8 */ /* ── cacheline 2 boundary (128 bytes) ── */ unsigned __int64 NoChecksumEntries;/* 0x80 8 */ struct _PO_HIBER_PERF PerfInfo;/* 0x88 768 */ /* ── cacheline 14 boundary (896 bytes) ── */ unsigned long FirmwareRuntimeInformationPages;/* 0x388 4 */ /* 4 bytes padding */ unsigned __int64 FirmwareRuntimeInformation[1];/* 0x390 8 */ unsigned __int64 IumFirmwareRuntimeInformationPageCount;/* 0x398 8 */ unsigned __int64 IumFirmwareRuntimeInformationPfnBase;/* 0x3a0 8 */ unsigned long SpareUlong;/* 0x3a8 4 */ unsigned long NoBootLoaderLogPages;/* 0x3ac 4 */ unsigned __int64 BootLoaderLogPages[24];/* 0x3b0 192 */ /* ── cacheline 17 boundary (1088 bytes) ── */ unsigned long NotUsed;/* 0x470 4 */ unsigned long ResumeContextCheck;/* 0x474 4 */ unsigned long ResumeContextPages;/* 0x478 4 */ unsigned long Hiberboot : 1;/* 0x47c:0 4 */ unsigned long SecureLaunched : 1;/* 0x47c:1 4 */ unsigned long SecureBoot : 1;/* 0x47c:2 4 */ unsigned long Fasr : 1;/* 0x47c:3 4 */ unsigned long HiberResumeXhciHandoffSkip : 1;/* 0x47c:4 4 */ unsigned long InitializeUSBCore : 1;/* 0x47c:5 4 */ unsigned long ValidUSBCoreId : 1;/* 0x47c:6 4 */ unsigned long SkipMemoryMapValidation : 1;/* 0x47c:7 4 */ unsigned long SuppressResumePrompt : 1;/* 0x47c:8 4 */ unsigned long HardwareSignatureValid : 1;/* 0x47c:9 4 */ unsigned long RootPartition : 1;/* 0x47c:10 4 */ unsigned long Feature_SrtmAntiRollback_Enabled : 1;/* 0x47c:11 4 */ unsigned long DevControlInitialized : 1;/* 0x47c:12 4 */ unsigned long Feature_PlutonDynamicUpgrade_Enabled : 1;/* 0x47c:13 4 */ unsigned long Feature_Servicing_ARM64_Hibernate_NonDRTM_Hypervisor_Enabled : 1;/* 0x47c:14 4 */ unsigned long Feature_PlutonNVDynamicUpgrade_Enabled : 1;/* 0x47c:15 4 */ unsigned long Feature_PlutonNvidiaN1c_Enabled : 1;/* 0x47c:16 4 */ unsigned long Feature_PlutonNvidiaDriver_Enabled : 1;/* 0x47c:17 4 */ unsigned long Feature_StxTpmFix_Enabled : 1;/* 0x47c:18 4 */ unsigned long Feature_PlutonMDS_Enabled : 1;/* 0x47c:19 4 */ unsigned long Reserved : 12;/* 0x47c:20 4 */ /* ── cacheline 18 boundary (1152 bytes) ── */ unsigned __int64 HvPageTableRoot;/* 0x480 8 */ unsigned __int64 HvEntryPoint;/* 0x488 8 */ unsigned __int64 HvReservedTransitionAddress;/* 0x490 8 */ unsigned __int64 HvReservedTransitionAddressSize;/* 0x498 8 */ unsigned __int64 BootFlags;/* 0x4a0 8 */ unsigned __int64 RestoreProcessorStateRoutine;/* 0x4a8 8 */ unsigned __int64 HighestPhysicalPage;/* 0x4b0 8 */ unsigned __int64 BitlockerKeyPfns[4];/* 0x4b8 32 */ /* ── cacheline 19 boundary (1216 bytes) ── */ unsigned long HardwareSignature;/* 0x4d8 4 */ /* 4 bytes padding */ union _LARGE_INTEGER SMBiosTablePhysicalAddress;/* 0x4e0 8 */ unsigned long SMBiosTableLength;/* 0x4e8 4 */ unsigned char SMBiosMajorVersion;/* 0x4ec 1 */ unsigned char SMBiosMinorVersion;/* 0x4ed 1 */ unsigned char USBCoreId;/* 0x4ee 1 */ unsigned char Feature_OfflineDumpRedaction_Enabled;/* 0x4ef 1 */ unsigned short OffdumpRedactionState;/* 0x4f0 2 */ /* 2 bytes padding */ union { unsigned RawPciLocation;/* 0x4f4 0 */ struct { union { unsigned Segment : 16;/* 0x4f4:0 0 */ unsigned Bus : 8;/* 0x4f4:16 0 */ unsigned Device : 5;/* 0x4f4:24 0 */ unsigned Function : 3;/* 0x4f4:29 0 */ };/* 0x4f4 0 */ } Fields;/* 0x4f4 4 */ } DevControlPciLocation;/* 0x4f4 4 */};size 1272 (0x4f8)72 members5 holes (18 bytes)padding 020 cachelines
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